Just one little glitch, the Tag Connect is mirrored (I'd have to plug it in 180° rotated) so using the pin header for now.
Thanks so much, this is how open source works

I'm just now having some time to take a look at this.
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1 VCC
2 SWDIO / TMS
3 nRESET
4 SWCLK / TCK
5 GND (also connected to GNDDetect)
6 SWO / TDO
If you look at the PCB files, the crystal is a few inches away from the clockgen circuitry.
Sounds good. I'll have to make some space next to the crystal but it's a SOT23, pretty easy to fit there.johu wrote: ↑Fri Mar 05, 2021 10:02 am Oh, forgot to follow up on this. I think to not disturb the crystal it is probably best to keep the traces to the crystal short and have a longer one running from comparator to line driver. I'm thinking 8 MHz is not that high of a frequency. After all it is being transmitted via a rather lengthy cable to the current sensors.
Heh... Looks like I had literal tunnel vision, thought that was the output connector itself.
Parts availability is currently a general issue.. You could have a look at the AUIPS2041LTR. I use it as a self-protected low-side contactor switch. Limits at around 5A. Currently in stock at JLC, but already discontinued at the manufacturer website. Higher powered alternatives may me the BTS133 or BTS3028, however also not largely stocked at JLC.
TO-263 vs DPAK -- should be plenty of room. I'll whip up another revision, should be ready by tomorrow, then hopefully all is ready to go.
Thanks! I'll be sure to double and triple check those markings. We had no trouble with the SDU board but there's always room for mistakes.FJ3422 wrote: ↑Sat Mar 06, 2021 9:03 am Parts availability is currently a general issue.. You could have a look at the AUIPS2041LTR. I use it as a self-protected low-side contactor switch. Limits at around 5A. Currently in stock at JLC, but already discontinued at the manufacturer website. Higher powered alternatives may me the BTS133 or BTS3028, however also not largely stocked at JLC.
Also watch out with the polarity of the diodes; last week I corrected the polarity in the placement file before upload (of some BMS-master design), and noticed after a few days that JLC rotated them during their 'DFM-Analysis'. They could not tell my why, silkscreen indications were OK, so they rotated them back after a short chat-conversation.