Large jitter on angle in resolver and sincos mode

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Re: Large jitter on angle in resolver and sincos mode

Post by johu »

bexander wrote: Mon Nov 16, 2020 5:37 pm For future logic board designs it might be a good idea to consider using a 3,0V shunt voltage precision reference supplied from the 3,3V bus, to supply the VDDA. This will require HW adjustments on resolver signals (to keep the below 3,0V) and maybe current and voltage feedback as well but should give a solid supply to VDDA.
Of course it will improve SNR, the question is: is it required? If we were operating a CNC machine I'd say yes but we are just operating a vehicle with the pretty dull task of moving a whole lot of air out the way - not exactly a precision task ;)
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Re: Large jitter on angle in resolver and sincos mode

Post by bexander »

Obviously the board is working as proven by people using it.
I found the spikes in "angle" and other ADC measurements. It is not required to do anything about this but to me it is hard to let it go when I see potential problems that is easy to fix. I have a separate 3,3V supply to the WiFi-module and changed the CAN-transceiver to mitigate the spikes.
By powering VDDA with a voltage reference costing less than 1€ there will be even more robustness, but this is just a suggestion.

One can use a ICE to power a car to, but whats the fun in that...? :)
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Re: Large jitter on angle in resolver and sincos mode

Post by johu »

I now find you do have a point in trying to increase SNR. Not about the resolver, but about the current sensors.

I have currently implemented a standstill offset calibration for the current sensors. So 250ms after the motor has come to a halt and no torque is requested an offset calibration is done, averaging over 64 samples. But still the offset is sometimes incorrect, resulting in bobbing at low speed.

I will try increasing the number of samples, maybe that is already sufficient. Also this would improve the situation on existing hardware.
As a precaution on new hardware, I would try some of your methods, like separate supply of CAN and wifi. And perhaps a shunt reference on VDDA. Would rather derive that from the 5V rail to be able to stick to 3.3V. Of course I will botch that in first to see how much improvement it yields. You've already done that for wifi and CAN.
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Re: Large jitter on angle in resolver and sincos mode

Post by bexander »

All ADC measurements will be effected when VDDA is noisy.
Unfortunately I have not been able to test with the CAN tranciever mod as I'm in the middle of a battery change which takes more time than expected...
I will report as soon as I have tested.

I don't think the root cause is the offset calibration but rather the spikes in the measured currents. If I remember correctly I could see spikes in the size of 5A at standstill (zero current). At low current this not neglible and might cause the slight jerkyness.

Implementing the separate supply to the WiFi-module and CAN will remove the noisy consumers from the 3,3V. Then only the STM itself may cause noise, however I have not found any so the use of an extra shunt reference on VDDA is more extra robustness.

Supplying the reference from the 5V rail is tempting but according to the documentation VDDA must be supplied from VDD.
See page 68, section 5.1.1 in https://www.st.com/resource/en/referenc ... ronics.pdf
My guess is that if VDDA rises above VDD during startup/shut-down, damage may occur.
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Re: Large jitter on angle in resolver and sincos mode

Post by bexander »

I have finally hade the chance to test the car today. Took it out for a very short drive in the neighborhood.
There are still some jerkyness, most noticable when doing regen to full stop.
It has taken so long time since I've drove it the last time it is hard to remember, but I think the jerkyness is less than before.
This is tested with the R4.94 firmware.
I will now upgrade to latest firmware version and make no further investigation in this matter.
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