Page 11 of 11

Re: Switched ADC BMS

Posted: Mon Jun 30, 2025 8:06 am
by johu
Pretty cool idea. Since balancing only makes sense when there is no current flow there is also no risk of missing an over voltage event.

Re: Switched ADC BMS

Posted: Mon Jun 30, 2025 9:22 pm
by johu
Now after running 6 modules in my ESS for some weeks with old, high R_int LFP batteries there are some observations:

- it is dead stable, even over multiple power cycles and even with some 2.1 modules in there
- SoC calculation is all over the place. Sometimes it estimates when there's still current flowing
- SoH calculation is completely off
- Charge curve parameters need to be tuned carefully to avoid oscillation. Will attach my configuration later
- It would be good to have hysteresis. So when ucellmax is reached it should output 0 charge setpoint until ucellmax-threshold is reached
- internal resistance estimation could come in useful

Re: Switched ADC BMS

Posted: Tue Jul 01, 2025 2:28 pm
by johu
skr wrote: Fri Jun 27, 2025 3:55 pm Will try playing with those resistors the next time I open the bike up, thank you for the advice!
Just found there is a software way to do it. Right now the lower two FETs are closed for dissipative balancing. That is via the 2x10R resistors. If the upper two FETs are closed it would skip those resistors.

Re: Switched ADC BMS

Posted: Tue Jul 01, 2025 5:54 pm
by skr
Just this morning my sleep deprived brain was wondering about this by trying to visualize the current flow.

First need to get rid of PTCs in front of my cell taps, as most likely they shoot up in resistance at summer temps just above 100mA.

Given the low duty cycle imo targeting a few hundred mA balancing on 750mA MEB fuse should be safe. Maybe PWM them between open and closed for variable current flow.

Let me know if you figure out the logic for fets, I am a bit skeptical on experimenting this not on my no longer existing bench setup and not sure when I can find a moment to make a new setup.