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STM32F405 build

Posted: Tue Dec 03, 2024 3:21 am
by jetpax
I have some F405 parts and thought I’d try and build OI/Zombie for them

Ive seen mention of such a build in the comments, is there a repo somewhere that i could use to get started?

Re: F405 build

Posted: Tue Dec 03, 2024 9:21 am
by royhen99
Ferrari F405 or STM32F405? I assume the later but this could be better reflected in the thread title.
There is a version of libopeninv library for the STM32F40x but the last update was Feb 2022, so will not work with most recent code. There are major changes in the CAN setup with the splitting of canmap and sdo into separate modules.

Re: F405 build

Posted: Tue Dec 03, 2024 12:15 pm
by johu
Yes unfortunately libopencm3 doesn't make the chips fully transparent. Many details are different.
I just did above mentioned branch for a one off project, so it's not complete and very outdated

Re: STM32F405 build

Posted: Tue Dec 03, 2024 4:30 pm
by jetpax
Thank Johannes, did not see that branch šŸ™„. So at this point do you think my best option would be to port your F4 changes into current mainline?

Re: STM32F405 build

Posted: Sat Jan 11, 2025 3:30 am
by jetpax
To support the HeadlessZombie I ported the STM32-vcu code to STM32F405.

That required porting the libopeninv code too, so in case its useful to anyone else here's a preliminaryt WIP version that builds under Platformio, using their version of libopencm3.

( I had to merge the CAN and ADC1 changes from @Johu over to my local machine to make it work, but thats only a couple of lines and t means it is running on a much newer version with better non F1 support. Shame the libopencm3 maintainers have not accepted your PRs after all these years :( )

Re: STM32F405 build

Posted: Sat Jan 11, 2025 10:49 am
by royhen99
I only had a quick look at can and digio, and found a few errors.

Can bus bit timings are wrong. The older version of F4 library assumed a clock frequency of 168MHz ( or 84MHz ) which gives can bus clock source at 42MHz. Timings in original version were correct but need to add values for 800kbps. You removed the while statement on the can receive function.
I use while (can_available_mailbox (canDev)){ .... in my STM32G4 version which should also work for the F4. Some of the can isr have the wrong names.

For GPIO you have gpio_mode_setup but may also need gpio_set_output_options which sets the output type and speed.

One major difference between the F1 and F4 ( and all other STM32 ) is the RTC. The F1 has a 32 bit counter that is not available on STM32F4. I used systick to replace this but it not as tidy as I implemented it outside of the library code.

Re: STM32F405 build

Posted: Sat Jan 11, 2025 1:33 pm
by jetpax
Thanks for the tips, especially can_receive() :oops:

Are you saying that can_available_mailbox () removes the need for johus CAN mods in libopencm3?

Do you have a repo with your G4 port so I can take a look?

reRTC, I used the Wakeup timer to generate a 1Hz interrupt driven counter to emulate the missing F1 function

Re: STM32F405 build

Posted: Sat Jan 11, 2025 2:31 pm
by royhen99
For G4 and updated F4 version there are no modifications to libopencm3. They are all done in the libopeninv code.

G4 and recently updated F4 versions are at github below. F4 mostly untested, G4 mostly works except saving/reading flash still needs fixing. It uses 64 bit read/write so is different from both F1 and F4.

https://github.com/royh99/libopeninv

Re: STM32F405 build

Posted: Sat Jan 11, 2025 3:21 pm
by jetpax
Great, wish I could have found that before :roll:

So you're using the outdated libopencm3 as modified by @johu et al?

Any particular reason for not #ifdeffing the changes from F1?

Re: STM32F405 build

Posted: Sat Jan 11, 2025 3:51 pm
by royhen99
#ifdeffing makes the code less readable and as I modified files based on F1 version rather than modifying old F4 version it did not seem necessary. It's an F4 branch not F1/F4.