Page 1 of 1

Increasing SNR

Posted: Mon Jan 16, 2023 7:46 am
by johu
To increase the smoothness and reduce drive train noise I'd like to make better use of the dual ADCs in the STM32.

I'd like to extend the ADC (anain) module to use both ADC simultaneously. So the list of analog inputs is distributed over both ADCs

Code: Select all

   ANA_IN_ENTRY(throttle1, GPIOC, 1) \
   ANA_IN_ENTRY(throttle2, GPIOC, 0) \
   ANA_IN_ENTRY(udc,       GPIOC, 3) \
   ANA_IN_ENTRY(tmpm,      GPIOC, 2) \
   ANA_IN_ENTRY(tmphs,     GPIOC, 4) \
   ANA_IN_ENTRY(uaux,      GPIOA, 3) \
   ANA_IN_ENTRY(il1,       GPIOA, 5) \
   ANA_IN_ENTRY(il2,       GPIOB, 0)
So throttle1 is sampled by ADC1, throttle2 by ADC2, udc ADC1 and so on. I think it must be an even number of channels so that both ADCs finish at the same time. First advantage is doubled throughput, second advantage is adjacent channels are sampled simultaneously, most of all il1 and il2. I'd even consider weaving those two between the other channels so they get sampled more often

Code: Select all

   ANA_IN_ENTRY(throttle1, GPIOC, 1) \
   ANA_IN_ENTRY(throttle2, GPIOC, 0) \
   ANA_IN_ENTRY(il1_1,       GPIOA, 5) \
   ANA_IN_ENTRY(il2_1,       GPIOB, 0)
   ANA_IN_ENTRY(udc,       GPIOC, 3) \
   ANA_IN_ENTRY(tmpm,      GPIOC, 2) \
   ANA_IN_ENTRY(il1_2,       GPIOA, 5) \
   ANA_IN_ENTRY(il2_2,       GPIOB, 0)
   ANA_IN_ENTRY(tmphs,     GPIOC, 4) \
   ANA_IN_ENTRY(uaux,      GPIOA, 3) \
   ANA_IN_ENTRY(il1_3,       GPIOA, 5) \
   ANA_IN_ENTRY(il2_3,       GPIOB, 0)
Be aware that ADC2 cannot use DMA independently of ADC1. It uses the upper 16 bits of the ADC data register.

Now that both ADCs are running I'd also oversample the resolver. Like sin on ADC1, cos on ADC2, both sampled 4 times (or just 3 if the first sample is noisy again). And again simultaneously.

In FOC I'd try running the forward transformation 3 times (ilx_1-3) and take the average or median of the result. I think that can be more useful than filtering the AC values

Re: Increasing SNR

Posted: Mon Jan 16, 2023 8:30 am
by Pete9008
Great idea, particularly the simultaneous sampling.

I'm doing something similar on the F405 but it has three ADCs so two are dedicated to multiple simultaneous samples of the il1 and il2 currents and the third does everything else.

Re: Increasing SNR

Posted: Mon Jan 16, 2023 1:17 pm
by catphish
I definitely agree that simultaneous sampling (particularly of related values like i1 and i2) and hardware oversampling is a great idea. It would be much better if this was handled in hardware, and then the software can simply pull the last value from DMA.

Re: Increasing SNR

Posted: Tue Oct 24, 2023 8:53 am
by johu

Re: Increasing SNR

Posted: Tue Apr 02, 2024 10:25 pm
by johu
I have now done the above but at least SNR wise there is no difference. Maybe it is somehow beneficial that coherent signals are sampled at the same time but probably the 1us delay didn't hurt too much with a 500 Hz signal bandwidth.

There's not drawbacks that I can see so I will test in the car next. Not expecting any real difference.

Re: Increasing SNR

Posted: Wed Apr 03, 2024 6:24 pm
by johu

Re: Increasing SNR

Posted: Wed Apr 03, 2024 10:20 pm
by MattsAwesomeStuff
johu wrote: Wed Apr 03, 2024 6:24 pmDid test drive it and as expected it doesn't seem to change much