STM32F107 cant get 2MHZ SPI

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EV_Builder
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STM32F107 cant get 2MHZ SPI

Post by EV_Builder »

I need a precise 2Mhz SPI clock, but something is wrong somewhere...

I get 2.268Mhz.

Are we sure the order/code is correct in the VCU project?

i modified to multiply by 8 so 8*8 = 64. Then 32 is there for Perph1 and 64 is there for Perph2.
SPI devide by 16 should give 2 but it doesn't do that.
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Re: STM32F107 cant get 2MHZ SPI

Post by EV_Builder »

Ok finally some progress but the clock modifications // integration of libopencm3 isn't correct.
the tell tale is already the :

Code: Select all

    //RCC_CLOCK_SETUP();

    //This is done because the other libary doesn't build within our makefile..crap solution...
    //rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV6);
Normally you adjust that RCC method..

Some faillures aren't detected by the compiler etc..
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Re: STM32F107 cant get 2MHZ SPI

Post by EV_Builder »

ok found it. The problem / solution is that pll needs tobe turned off before it can be modificated and used.
It means that its possible that the master branch is running from the internal OSC.
Because now my Clock is dead stable and it wasn't stable before.
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Re: STM32F107 cant get 2MHZ SPI

Post by EV_Builder »

ok, this is now solved. The problem is that the project that i used VCU project wasn't totally correct.
This is the snippet for the VCU project.

Code: Select all

	/*
	 * Sysclk runs with 72MHz -> 2 waitstates.
	 * 0WS from 0-24MHz
	 * 1WS from 24-48MHz
	 * 2WS from 48-72MHz
	 */
[i]	flash_prefetch_enable(); //we should enable the prefetch
	flash_set_ws(FLASH_ACR_LATENCY_2WS); //we go wtih 72Mhz[/i]

	/* Enable internal high-speed oscillator. */
	rcc_osc_on(RCC_HSI);
	rcc_wait_for_osc_ready(RCC_HSI);

	/* Select HSI as SYSCLK source. */
	rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSICLK);

	/* Enable external high-speed oscillator 8MHz. */
	rcc_osc_on(RCC_HSE);
	rcc_wait_for_osc_ready(RCC_HSE);
	rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSECLK);

	/*
	 * Set prescalers for AHB, ADC, APB1, APB2.
	 * Do this before touching the PLL (TODO: why?).
	 */
	rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV);    /* Set. 72MHz Max. 72MHz */
	rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV8);  /* Set.  9MHz Max. 14MHz */
	rcc_set_ppre1(RCC_CFGR_PPRE1_HCLK_DIV2);     /* Set. 36MHz Max. 36MHz */
	rcc_set_ppre2(RCC_CFGR_PPRE2_HCLK_NODIV);    /* Set. 72MHz Max. 72MHz */

[b]    rcc_off(RCC_PLL);//turn of PPL else MUL cant be modified...[/b]

	/*
	 * Set the PLL multiplication factor to 9.
	 * 8MHz (external) * 9 (multiplier) = 72MHz
	 */
	rcc_set_pll_multiplication_factor(RCC_CFGR_PLLMUL_PLL_CLK_MUL9);

The bold part was missing. By default the STM32 has MUL9 so if the board uses 8Mz its fine at 72 but if the crystal is 12Mhz....
So in my case now it works if i put it to 8 and modify the rest of the parameters accordingly.

Italic, the flash is on top (if i see others doing it) and we should enable prefetch too.

Now i have a steady 2Mhz on my scope.
Before this modd, which made it accept the MUL it wasn't steady at all so i have no clue if the boards are running HSE or HSI.
Yes the OSC can be enabled but it doesn't mean the source of the PLL has switched correctly etc.
Converting an Porsche Panamera
see http://www.wdrautomatisering.nl for bespoke BMS modules.
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