Tesla Model 3 Rear Drive Unit Hacking

[johu]

The day of working inverters viewtopic.php?p=82795#p82795

Persistence paying off, great job!

[Jack Bauer]

Sorry for the late update folks. Been down with a stomach bug. But hey , its been 5 years so whats another week. Anyway, before running any real power through the inverter I decided to scope the gate-source waveforms just in case. High sides looked fie but all THREE lowsides showed this sort of a weird ground bounce effect of the other 2 low sides switching. Did dome probing around and narrowed into the "56Ohm" source resistors. Hmmm. Guess what? They are not 56 Ohms on the OEM board.... rather 0.56Ohms!!!

Got the right ones ordered but still feeling very happy about progress on this 1st prototype.

[johu]

Nicely caught in time!

[Jack Bauer]

Just a model 3 inverter with an OI board running a model 3 motor.... nothing interesting:)

[Jack Bauer]

For those interested current V2 board schematic. Not finalised yet but has corrections from V1 and now all component values and types populated. Basically the current board minus the bodges:)

[Jack Bauer]

[Beatbuzzer]

Do you have any thoughts about the sort of pyrofuse, placed in the newer rear inverters? Would you transfer it to your design or remove it? I mean, it simply goes away by removing the pcb Only attached with two screws in the frame of the hall sensor.

Seems its not only placed in plaid, but also in Model 3 long range and standard range from 2022. My rear inverter is a 3D5 from 2022 and has it.

I'm in a little research at the moment. There is an additional circuit on the right side of the pcb. Connection of the squib is wired in parallel to the two bigger 499R resistors.

[davefiddes]

Managed to get my JTAG connection working again so I can make some improvements to the Tesla M3 gate driver support:

https://github.com/davefiddes/stm32-sin ... provements

So far I've included the various fixes from above and a new version of the gate driver class. This has a correctness fix in the initialisation verification process. It also pipelines SPI requests when polling the status which makes it substantially more efficient. Both changes more accurately reflect the behaviour of the original Tesla firmware.

I'm planning on parsing out the gate driver failures and reporting them as spot values shortly.

[Jack Bauer]

Thats excellent Dave. Thanks. I've been cleaning up the board and getting ready to order V2. By the time it arrives I'll have the Volvo V50 test mule in the barn and ready for full up tests.

[davefiddes]

Meanwhile in Open Source development... I have finished making the updates to the Tesla M3 gate driver support code to pull out the detailed fault information:

https://github.com/jsphuebner/stm32-sine/pull/51

@crasbe was absolutely correct in their analysis as to the order in which replies are received from the gate driver SPI chain. My new code now pulls out the details of any fault on a chip by chip basis. If you are having a good day it looks like this:

Code: Select all

...
uptime              : 22820 [10ms]
cpuload             : 2 [%]
m3_phaseA_hi        : OK
m3_phaseA_lo        : OK
m3_phaseB_hi        : OK
m3_phaseB_lo        : OK
m3_phaseC_hi        : OK
m3_phaseC_lo        : OK

Given the sorts of issues with the high-side SENSE pins being not connected properly to ISOGND we saw the other week it would look like:

Code: Select all

...
uptime              : 22820 [10ms]
cpuload             : 2 [%]
m3_phaseA_hi        : OK
m3_phaseA_lo        : DESAT
m3_phaseB_hi        : OK
m3_phaseB_lo        : DESAT
m3_phaseC_hi        : OK
m3_phaseC_lo        : DESAT

If the gate drive PSU turns off unexpectedly:

Code: Select all

...
uptime              : 22820 [10ms]
cpuload             : 2 [%]
m3_phaseA_hi        : REGERRR, REGERRL
m3_phaseA_lo        : REGERRR, REGERRL
m3_phaseB_hi        : REGERRR, REGERRL
m3_phaseB_lo        : REGERRR, REGERRL
m3_phaseC_hi        : REGERRR, REGERRL
m3_phaseC_lo        : REGERRR, REGERRL

It's probably bolting the door after the horse has departed but hopefully it'll be helpful should anything go wrong. Some of the errors it can report I don't think will ever be reported (ASC and SENSE) but better to have the decoding in there than be left in the dark if something weird happens.

[johu]

I have moved the now closed source CAN hacking here: viewtopic.php?t=6497

[Jack Bauer]

Thanks Dave. I'll get this in the board. Should have the V50 ready for tests this week. So far I once accidently (and once on purpose) shorted two phases with a screwdriver during low voltage bench tests. Trips off the inverter and restarts no problem.