FOC low speed stuttering

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bexander
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FOC low speed stuttering

Post by bexander »

Been doing more testdriving.
I'm experience low speed stuttering at 2-3km/h. I'm running SW 5.00 but experienced the same thing with SW 4.94.
It happens around 2-3km/h => 150rpm(130-195) motorspeed or 10Hz fstat.
At higher speeds it is very smooth. At lower speeds much smoother so there seem to be a short steep peak at close to 10Hz fstat which is very odd to me?
My parameters:
Prius_MGR_FW5_00FOC_2021_03_27.json
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Re: Renault Clio Electrique -97

Post by arber333 »

bexander wrote: Wed Mar 31, 2021 9:06 am Been doing more testdriving.
I'm experience low speed stuttering at 2-3km/h. I'm running SW 5.00 but experienced the same thing with SW 4.94.
It happens around 2-3km/h => 150rpm(130-195) motorspeed or 10Hz fstat.
At higher speeds it is very smooth. At lower speeds much smoother so there seem to be a short steep peak at close to 10Hz fstat which is very odd to me?
Yes that is exactly what i am seeing at dense traffic speeds with Mazda. And i thought it was ACIM dependant. I thought that peak is associated with regen comming online at slow speed. I set regen transition to 30Hz, but nothing changed. Except now with additional filtering it seems a bit better. The fact my transmission has a lot of play in 2nd gear also does not help...
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Re: Renault Clio Electrique -97

Post by Zapatero »

Same for me, rattling and shaking at low speed, newest version of software.
I think Johannes is working on this!?
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Re: Renault Clio Electrique -97

Post by bexander »

Interesting!
I tested with setting the brkrampstr to 50 and that helps in getting smoother stops but, to what I could note, no effect on acceleration.
A note as well, I get the same behavior in reverse as in forward. So not dependent on motor direction.

To be very clear, during a very slow acceleration,
0-2km/h there are some very small hesitations, barely noticable.
2-3km/h quite noticable shaking.
3->km/h smooth
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Re: Renault Clio Electrique -97

Post by arber333 »

Yeah... it is a bit like turboshaft engine N1-N2 transition speed. Nothing can really be done about it, you just have to go through that area as fast as possible to avoid shaft resonance. In my case i see improvement when using Leaf gearbox on P406 instead of OEM TX on Mazda.

Just so you do not misunderstand: even Lebowski drive produces some shaking on start. It is just much less annoying...
A lot can be solved by using full rubber mounts instead original engine mounts that are holed.
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Re: Renault Clio Electrique -97

Post by johu »

Yes l'm aware that low speed operation is shaky, the SNR of the current sensors and the resolver becomes more noticable. At higher speed the inertia of the motor covers it up.
Would like to play with some additional filtering. It needs a lot of testing as every filter introduces a delay and a delay can lead to control loop instability.

bexander: Are you running your modified hardware with separate supply of wifi module?
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Re: Renault Clio Electrique -97

Post by bexander »

johu wrote: Thu Apr 01, 2021 8:59 am Yes l'm aware that low speed operation is shaky, the SNR of the current sensors and the resolver becomes more noticable. At higher speed the inertia of the motor covers it up.
Would like to play with some additional filtering. It needs a lot of testing as every filter introduces a delay and a delay can lead to control loop instability.

bexander: Are you running your modified hardware with separate supply of wifi module?
Yes, I'm running with separate supply to wifi module and a CAN-transceiver with 5V supply.
I'm also running a resolver signal filter of 330ohm/33nF, where as stock on Yaris board is 10k/1nF. (As per STM32 datasheet regarding ADC, to high series resistance will effect measurement due to inrush current during measurement) Now realizing that the same principle applies to the current measurement as well...
On the other hand, I think the SW handles the eventual drop in signal during measurement as it does a zero calibration.

Maybe use active filters of the current sensor and resolver feedback signals?
Should be possible to get a lot lower output impedance and also use 2nd order filter? I could look in to it if you think it will be of use?
How is this done in OEM-inverters, signal filtering etc? Maybe time to bring out the stock Toyota logic board and have a look at there design.
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Re: Renault Clio Electrique -97

Post by johu »

Ok, so that alone doesn't seem to increase the SNR sufficiently.
I would be especially interested in software filters because everyone can benefit without hardware replacement. So far I use a few flavours
- Averaging
- Median (of 3 values)
- IIR filter v = (v_new + v_old * 2^(n-1)) / 2^n

I'm sure there are better ones.
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Re: Renault Clio Electrique -97

Post by mjc506 »

Kalman filters work well, but need to characterise the system pretty accurately - not reasonable for this I think.

Open loop current control at low pedal settings? Or do you think its more the resolver/velocity oscillations?
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Re: Renault Clio Electrique -97

Post by bexander »

Yes, you can do magic with SW, but if the input to the SW is bad the output will be bad as well...

Regarding current feedback I don't think there is much you can do with HW. The current transducers should have resonable drive capabillity. Possibly use of a filter with lower impedance to reduce effect of ADC.
Regarding the resolver more can be done but it will for shure complicate the HW.

Here is an interesting information from ST regarding resolvers. Maybe test a 3,0V voltage reference for STM32, VDDA supply, should reduce ADC noise. Will require adjustment to both HW and SW, but reasonable.
Or even use of another STM32 with separate Vref and ADC supply? Requires totally new HW and most likely largely changed SW as well so not the first one to test.

I can't help much with SW but I should be able to help with HW upgrades and testing, if wanted.
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Re: Renault Clio Electrique -97

Post by johu »

On the mini mainboard I decoupled VDDA with 100uH and 10uF from VDD instead of 10uH/1uF on the V3 mainboard. That decreased ADC noise. Can you try that?
But I do suspect the noise comes from outside.

Filter-wise it doesn't really matter whether filtering is done in SW or HW. HW filter is also crap in -> signal out, the same can be done in software.

I studied the paper a bit, unfortunately no real surprises. They use opamps for adding gain and offset where we just use resistors. They low pass filter at 150 kHz, we at 60 kHz.
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Re: Renault Clio Electrique -97

Post by bexander »

According to the BOM for the Yaris board there should be 10uH/10uF on my board.
In attached ST paper I found that they recommend using 1uF in parallel with 10nF for decoupling of VDDA (page 24). Also, they talk about reducing inductance as this can cause oscillation and use ferrite cores as well. Overall, I agree with that the noise probably comes from the outside but VDDA is a very sensitive point as it effects all ADC:s.

Regarding the resolver paper, they also use a voltage doubler for the resolver supply signal. That is one way to increase SNR, by increasing the signal amplitude. And the difference by using op-amps is you get much lower output impedance which might be helpful to reduce noise with the type of ADC used.

Also, using separate analog ground all the way from external connector to the ADC(VSSA) might help reduce noise.

Analog signals is a pain but also very interesting...

EDIT: Maybe a good idea to source a extra motor with resolver. Then I would have a complete extra setup, not needing to do all testing in the car.
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Re: Renault Clio Electrique -97

Post by johu »

Yes actually I have a Prius transaxle here, just need to get the resolver plug and I could test with Gen2 Prius board.

I found an interesting plot in that AN, voltage dip on a 1k/2nF filtered signal. Suggests the signal has fully recovered after 34 ns. We are running 9 MHz ADC clock, so that would be about 4 clock cycles. But I just programmed 1.5 clock cycles sampling time. Can check the influence of that. But even after 1.5 cycles the signal has recovered mostly. Back when I experimented with the resolver I couldn't see any influence of the sampling time.
Attachments
adc sampling.png
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Re: FOC low speed stuttering

Post by bexander »

Maybe I'm misunderstanding but 9MHz give a period time of 111ns and so 1,5 cycles for sampling would take 167ns.
Wouldn't this then result in the measurement is taken when the signal is fully recovered?
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Re: FOC low speed stuttering

Post by johu »

Oh, of course. Thats why it made no difference
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Re: FOC low speed stuttering

Post by johu »

So experimented a bit. There are two "auxiliary" feedback loops: dynamic integral gain and field weakening (curkifrqgain and fwkp). Both are only meaningful for high speed operation and could disturb operation in low speed. So put the car on a hill with them at default (50, -100). Then when launching into the hill in first gear I experienced the stuttering. On a level road it is hard to notice. So I set them both to 0. Now the stuttering is not gone but seemed less pronounced. Can you guys try that?
If it helps I will ramp down those two at low speed.
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Re: FOC low speed stuttering

Post by bexander »

I have now tested setting both curkifrqgain and fwkp to 0. I can't notice any difference between default value and 0. Tested a bit back and forth.

I'm attaching a graph of when I experience the stuttering.
IMG_1633.JPG
The first just above 0km/h is barely noticable (no problem living with) and then a quite steep peak between 2-3km/h (anoying, specially during regen brakeing to full stop), above this nothing. More noticable with slight uphill load. The same thing applies doing regen, steep peak at 2-3km/h.

EDIT: Just beeing very specific with what I'm experiencing so that if others have similar or not at all similar behavior.
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Re: FOC low speed stuttering

Post by johu »

Ok, too bad. I can post a screenshot of my angle and current plot to compare noise. It was like 3° jitter on angle and 7A on current.
Will try other filtering options next.
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Re: FOC low speed stuttering

Post by mjc506 »

Wild idea, feel free to shoot down... Jitter is down to noise presumably? Would a resolver to spi/i2c/etc gadget mounted right at the resolver be any help? (Minimal cabling to pick up noise, low noise related supply, low noise adc (better than the stm adc)

That of course is assuming that the noise is down to a combination of longish cable between resolver and board, noise in the analogue vcc, noisy stm32 adc?

Edit: or of course, 'just' a dedicated high quality 2 channel ADC would do it I suspect, although something designed for a resolver would probably handle things better.
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Re: FOC low speed stuttering

Post by bexander »

johu wrote: Sun Apr 04, 2021 4:30 pm Ok, too bad. I can post a screenshot of my angle and current plot to compare noise. It was like 3° jitter on angle and 7A on current.
Will try other filtering options next.
Is this what you are refering to with angle and current plots?
2021-04-05-103924_1024x600_scrot.png
2021-04-05-103544_1024x600_scrot.png
Both at standstill. No difference when in D, R or N. 10000 data points and burst length 1000.

Both currents are a bit offset but maybe within what you could expect?
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Re: FOC low speed stuttering

Post by johu »

Looks better than mine, will post later. And I don't have a bad stuttering problem, I really have to provoke it.
About external ADC: like said I would like to focus on a software solutions so that people with existing hardware can benefit.
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Re: FOC low speed stuttering

Post by bexander »

mjc506 wrote: Sun Apr 04, 2021 8:08 pm Wild idea, feel free to shoot down... Jitter is down to noise presumably? Would a resolver to spi/i2c/etc gadget mounted right at the resolver be any help? (Minimal cabling to pick up noise, low noise related supply, low noise adc (better than the stm adc)

That of course is assuming that the noise is down to a combination of longish cable between resolver and board, noise in the analogue vcc, noisy stm32 adc?

Edit: or of course, 'just' a dedicated high quality 2 channel ADC would do it I suspect, although something designed for a resolver would probably handle things better.
I don't think this is such a wild idea. However if the OEM can manage without this then it can't be impossible. In case of the MGR, it is mounted at the rear axle and the inverter is at the front with a ~4m reaolver signal cable inbetween.

If a digital signal transfer is to be used it is better to use CAN or RS485 rather than SPI/I2C. SPI/I2C are created to be used on a PCB and are not that robust.

I think the best idea is to first try to measure and analyze what is causing the errors and try to get it working as is.
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Re: FOC low speed stuttering

Post by mjc506 »

Good points re software solution and oem setups.

I looked at the stm adc again last night, seems it should be able to get with 0.1deg quite easily, so there's something else going on...
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Re: FOC low speed stuttering

Post by bexander »

johu: If you or anyone else is not experiencing what I'm experiencing then it is probably something I have done or something with my motor/inverter combination. Maybe has nothing to do with SW? Just don't want you to, again, put your time into something only I'm experiencing.
arber333 and Zapatero: Please describe a bit more in detail if you are experiencing what I'm experiencing or your behaviors are different.

I find it odd that if it is a signal/noise issue that it is so noticable at a specific speed only. Might be that when starting to move the disturbance increases and then at higher speeds it is masked by motor inertia, but still strange?
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Re: FOC low speed stuttering

Post by johu »

No worries, I think we have established that it is a systematic problem, just more or less pronounced on different vehicles.
Yes the way it is on Touran is very much acceptable (I will make a short video) but I want it to be smooth on all vehicles.
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